The present invention relates to the field of transmitting data between two or more devices. More particularly, the present invention relates to the field of transmitting data and controlling data transfer operations between devices over a bus structure.
The IEEE standard, xe2x80x9cIEEE Std 1394-1995 Standard For A High Performance Serial Bus,xe2x80x9d is an international standard for implementing an inexpensive high-speed serial bus architecture which supports both asynchronous and isochronous format data transfers. Isochronous data transfers are real-time transfers which take place such that the time intervals between significant instances have the same duration at both the transmitting and receiving applications. Each packet of data transferred isochronously is transferred in its own time period. An example of an ideal application for the transfer of data isochronously would be from a video recorder to a television set. The video recorder records images and sounds and saves the data in discrete chunks or packets. The video recorder then transfers each packet, representing the image and sound recorded over a limited time period, during that time period, for display by the television set. The IEEE 1394 serial bus architecture provides multiple channels for isochronous data transfer between applications. A six bit channel number is broadcast with the data to ensure reception by the appropriate application. This allows multiple applications to simultaneously transmit isochronous data across the bus structure. Asynchronous transfers are traditional data transfer operations which take place as soon as possible and transfer an amount of data from a source to a destination.
The IEEE 1394 standard provides a high-speed serial bus for interconnecting digital devices thereby providing a universal I/O connection. The IEEE 1394 standard defines a digital interface for the applications thereby eliminating the need for an application to convert digital data to analog data before it is transmitted across the bus. Correspondingly, a receiving application will receive digital data from the bus, not analog data, and will therefore not be required to convert analog data to digital data. The cable required by the IEEE 1394 standard is very thin in size compared to other bulkier cables used to connect such devices. Nodes can be added and removed from an IEEE 1394 bus while the bus is active. If a device is so added or removed the bus will then automatically reconfigure itself for transmitting data between the then existing nodes. A node is considered a logical entity with a unique address on the bus structure. Each node provides an identification ROM, a standardized set of control registers and its own address space.
The IEEE 1394 standard defines a protocol as illustrated in FIG. 1. This protocol includes a serial bus management block 10 coupled to a transaction layer 12, a link layer 14 and a physical layer 16. The physical layer 16 provides the electrical and mechanical connection between a device or application and the IEEE 1394 cable. The physical layer 16 also provides arbitration to ensure that all devices coupled to the IEEE 1394 bus have access to the bus as well as actual data transmission and reception. The link layer 14 provides data packet delivery service for both asynchronous and isochronous data packet transport. This supports both asynchronous data transport, using an acknowledgement protocol, and isochronous data transport, providing real-time guaranteed bandwidth protocol for just-in-time data delivery. The transaction layer 12 supports the commands necessary to complete asynchronous data transfers, including read, write and lock. The serial bus management block 10 contains an isochronous resource manager for managing isochronous data transfers. The serial bus management block 10 also provides overall configuration control of the serial bus in the form of optimizing arbitration timing, assignment of the cycle master, assignment of isochronous channel and bandwidth resources and basic notification of errors.
The IEEE 1394 trade association standard, xe2x80x9c1394TA IICP Specification for the Instrument and Industrial Control Protocol,xe2x80x9d Specification 1.00, Oct. 8, 1999, is an international standard for efficient asynchronous communication to electronic instrumentation and industrial control devices using the IEEE 1394 serial bus. The protocol established by the 1394TA IICP specification uses a dual-duplex plug structure for transfer of data and command/control sequences. According to the 1394TA IICP specification, all communication is flow controlled between a producer device and a consumer device. A producer device is a device that writes data to a consumer device. A consumer device is a device that receives data from a producer device.
A typical 1394TA IICP connection between a computer and an instrument is illustrated in FIG. 2. The computer 20 is coupled to the instrument 22 by an IEEE 1394-1995 cable. The connection illustrated in FIG. 2 is a virtual representation of the data flow between the computer 20 and the instrument 22. The computer 20 includes a connection register 30 and a plug 24. The instrument 22 includes a connection register 38 and a plug 32. The connection registers 30 and 38 communicate connection requests and responses related to data transmissions between the plugs 24 and 32.
The concept of the plugs 24 and 32 and the plug control registers 30 and 38 is used to manage and control the attributes of asynchronous data flows over a 1394TA IICP connection. It should be noted that plugs do not physically exist on a 1394TA IICP device, but the concept of a plug is used to establish an analogy with existing devices where each flow of information is routed through a physical plug.
Each of the plugs 24 and 32 contain a data port and a control port. The plug 24 includes the data port 26 and the control port 28. The plug 32 includes the data port 34 and the control port 36. Each port within a plug allows duplex communications with the connected node. Through the data port 26, the computer 20, acting as producer, can send data to the instrument 22, acting as consumer, and can also receive data as a consumer device from the instrument 22, acting as a producer device. Correspondingly, through the data port 34, the instrument 22, acting as producer, can send data to the computer 20, acting as consumer, and can also receive data as a consumer device from the computer 20, acting as a producer device.
Control bytes are transferred from either the computer 20 or the instrument, whichever is acting as a producer of control bytes, to the other device, acting as a consumer of control bytes. Control bytes are control messages, interrupts, triggers and commands sent between the devices. The control port within the plug allows the data path to remain a pure data path.
The connection arrangement illustrated in FIG. 2 is a dual-duplex plug arrangement as both of the plugs 24 and 32 can send data and also include separate data and control ports. Data can also be sent through duplex plugs in which two devices are connected together and either of the devices can send data to the other device. A duplex plug sends data and control information through the same port instead of having separate data and control ports as in the dual-duplex plug arrangement. A simplex operation results if one of the plugs of a connected device does not produce frames and does not have the ability to transmit frame data.
A plug is a data structure including private memory and public memory. The plug private memory includes information necessary in setting up and maintaining a connection, including plug state information about the connected node. The plug public memory is mapped to IEEE 1394 memory space and can be updated by the connected node. To transfer data from a producer device to a consumer device, the consumer device first notifies the producer device through a write operation that it has space available in an associated segment buffer to receive data. Using a write transaction, the producer device then transfers the data to the segment buffer at the consumer device. Once the data is transferred, the producer device then confirms that the data has been transferred by a write transaction to the control register at the consumer device. This write operation causes an interrupt to occur at the consumer device, notifying the consumer device that the data has been transferred.
In a previous version of the 1394TA IICP specification, the output plug or data port on the producer device in a data transfer had up to 15 control registers and could be multicast to 14 concurrent input plugs, or data ports on the consumer devices. Each of the input plugs had an associated segment buffer to which data could be written. In this configuration, the segment buffer and control register associated with an input plug were contiguous making it difficult to differentiate between write operations to segment buffers which are directly mapped and write operations to register addresses which cause an interrupt. A further limitation to this approach, is that it cannot efficiently support large discontiguous transfers, due to constraints regarding the size of the segment buffer. The segment buffer is limited in size, typically to 4 Kbytes, because system software cannot allocate pages of memory contiguously.
In another previous version of the 1394TA IICP specification, the segment buffer and control register associated with an input plug were separated in the memory space, so that each input plug had two distinct address components. However, this approach also does not solve the problem associated with transferring large amounts of data and the inability to allocate pages contiguously.
Both small frames and large frames of data are transmitted from a producer device to a consumer device over an IEEE 1394 serial data bus. The small frames of data are preferably transmitted to a small frame buffer associated with a plug at the consumer device. Each transfer of a small frame generates an interrupt at the consumer device when the transfer is complete. For the transfer of large frames of data, the consumer device programs an array of page table entries into the plug control register of the producer device, prior to a transfer of a large frame of data. Each of the page table entries includes a starting address of a memory page at the consumer device to which data can be written. Together, these memory pages specified by the page table entries form a large frame buffer at the consumer device for receiving a large frame of data from the producer device. Preferably, the array of page table entries can be updated by the consumer device, as appropriate, between frame transfers. When transferring a large frame of data, the producer device begins writing to the first page specified in the first page table entry and continues in order, writing to the pages specified in the page table entries, until the entire frame has been transferred. When the entire large frame of data has been transferred, the producer device then updates the plug control register at the consumer device to notify the consumer device that the entire large frame has been transferred.
In one aspect of the present invention, a method of transferring data between a transmitting device and a receiving device includes the steps of sending a communication from the receiving device to the transmitting device including a notification that the receiving device is ready to receive data and a plurality of page table entries each corresponding to a location in memory of the receiving device to which the data is to be written and transferring the data from the transmitting device to the receiving device in one or more transactions to successive ones of the locations in memory corresponding to the page table entries. The method further includes the step of sending a notification from the transmitting device to the receiving device upon completion of transmission of the data. The method further includes the steps of determining if a single transaction will include all of the data and transferring the data to a small frame buffer at the receiving device if it is determined that the single transaction will include all of the data. The transfer of data to the small frame buffer causes an interrupt to occur at the receiving device. Preferably, the small frame buffer is a buffer within a plug control register. Alternatively, an address of the small frame buffer is specified by a designated one of the page table entries. The locations in memory corresponding to the page table entries are not contiguous. Together, the locations in memory corresponding to the page table entries form a large frame buffer. The page table entries are stored at the transmitting device in a control register. The method further includes the step of updating the page table entries before a transfer of a next frame. The one or more transactions include an extended transaction code specifying whether or not an interrupt is to occur upon completion of the transaction. A final transaction within a frame of data includes the extended transaction code specifying that the interrupt is to occur upon completion of the transaction. The transmitting device and the receiving device are coupled together by an IEEE 1394 serial bus. The transmitting device and the receiving device operate according to a version of the 1394TA IICP specification.
In another aspect of the present invention, a method of transferring data between a transmitting device and a receiving device includes the steps of sending a small frame control communication from the receiving device to the transmitting device including a notification that the receiving device is ready to receive a small frame of data, sending a large frame control communication from the receiving device to the transmitting device including a notification that the receiving device is ready to receive a large frame of data and a plurality of page table entries each corresponding to a location in memory of the receiving device to which portions of the large frame of data are to be written, receiving a frame of data from an application at the transmitting device, determining if the received frame of data is a small frame of data or a large frame of data, transferring the received frame of data to a small frame buffer at the receiving device if it is determined that the received frame of data is a small frame of data and transferring the received frame of data from the transmitting device to the receiving device in multiple transactions to successive ones of the locations in memory corresponding to the page table entries if it is determined that the received frame of data is a large frame of data. The method further includes the step of sending a notification from the transmitting device to the receiving device upon completion of transmission of the large frame of data. The transfer of data to the small frame buffer causes an interrupt to occur at the receiving device. The small frame buffer is a buffer within a plug control register. An address of the small frame buffer is specified by a designated one of the page table entries. Together, the locations in memory corresponding to the page table entries form a large frame buffer. The locations in memory corresponding to the page table entries are not contiguous. The page table entries are stored at the transmitting device in a control register. A small frame of data is transferred in a single transaction and a large frame of data is transferred in more than one transaction. The method further includes the step of updating the page table entries before a transfer of a next frame. The transmitting device and the receiving device are coupled together by an IEEE 1394 serial bus. The transmitting device and the receiving device operate according to a version of the 1394TA IICP specification.
In yet another aspect of the present invention, a transmitting device configured to transmit data to a receiving device includes an interface configured for coupling to the receiving device to transmit frame data to the receiving device and receive control data from the receiving device and a register coupled to the interface to store the control data, wherein the register includes a plurality of page table entries which are programmed by the receiving device and hold address data corresponding to locations in memory of the receiving device to which a frame of data is to be written, wherein the transmitting device transmits the frame of data to the receiving device in one or more transactions through the interface to successive ones of the locations in memory corresponding to the page table entries. The locations in memory corresponding to the page table entries are not contiguous. Together, the locations in memory corresponding to the page table entries form a large frame buffer. The receiving device has the ability to update the page table entries between transfer of each frame. The one or more transactions include an extended transaction code specifying whether or not an interrupt is to occur upon completion of the transaction. A final transaction within a frame of data includes the extended transaction code specifying that the interrupt is to occur upon completion of the transaction. The transmitting device is configured to transmit data to the receiving device over an IEEE 1394 serial bus. The transmitting device and the receiving device operate according to a version of the 1394TA IICP specification.
In another aspect of the present invention, a receiving device configured to receive data from a transmitting device includes an interface configured for coupling to the transmitting device to receive frame data from the transmitting device and transmit control data to the transmitting device and a plurality of memory pages which together form a frame buffer, each of the memory pages having a corresponding address, wherein the receiving device transmits the control data to the transmitting device including the addresses of the plurality of memory pages and the transmitting device will transmit the frame data to the receiving device in one or more transactions through the interface to successive ones of the plurality of memory pages. The receiving device further includes a small frame buffer coupled to the interface for storing a small frame of data transmitted from the transmitting device in a single transaction. The small frame buffer is a buffer within a plug control register. An address of the small frame buffer is specified by a designated one of the page table entries. The locations of plurality of memory pages are not contiguous. The page table entries are stored at the transmitting device in a control register. The receiving device has the ability to update the page table entries between transfer of each frame. The one or more transactions include an extended transaction code specifying whether or not an interrupt is to occur upon completion of the transaction. A final transaction within a frame of data includes the extended transaction code specifying that the interrupt is to occur upon completion of the transaction. The transmitting device is configured to transmit data to the receiving device over an IEEE 1394 serial bus. The transmitting device and the receiving device operate according to a version of the 1394TA IICP specification.
In still yet another aspect of the present invention, a communication system includes a transmitting device including a first interface for transmitting frame data and receiving control data and a first control register coupled to the first interface to store the control data including a plurality of page table entries and a receiving device including a second interface coupled to the first interface to receive the frame data from the transmitting device and transmit control data to the transmitting device, a second control register coupled to the second interface and a plurality of memory pages which together form a large frame buffer, each of the memory pages having a corresponding address, wherein the receiving device transmits the control data to the transmitting device including the addresses of the plurality of memory pages which are stored in the plurality of page table entries and further wherein the transmitting device transmits the frame data to the receiving device in one or more transactions to be written into successive ones of the plurality of memory pages. The receiving device further comprises a small frame buffer coupled to the second interface for storing a small frame of data transmitted from the transmitting device in a single transaction. The small frame buffer is included within the second control register. An address of the small frame buffer is specified by a designated one of the page table entries. The plurality of memory pages are not contiguous. The receiving device has the ability to update the page table entries between transfer of each frame. The one or more transactions include an extended transaction code specifying whether or not an interrupt is to occur upon completion of the transaction. A final transaction within a frame of data includes the extended transaction code specifying that the interrupt is to occur upon completion of the transaction. The first and second interfaces are coupled together by an IEEE 1394 serial bus. The transmitting device and the receiving device both operate according to a version of the 1394TA IICP specification.